| FloatingPoint_PrecisionErrata |
0 |
On a Pentium, a floating-point precision error can occur in rare circumstances.
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| FloatingPoint_Emulated |
1 |
Floating-point operations are emulated using a software emulator.
This function returns a nonzero value if floating-point operations are emulated; otherwise, it returns zero.
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| Compare_ExchangeDouble_Available |
2 |
The atomic compare and exchange operation (cmpxchg) is available.
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| MMX_Available |
3 |
The MMX instruction set is available.
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| XMMI_Available |
6 |
The SSE instruction set is available.
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| Now3D_Available |
7 |
The 3D-Now instruction set is available.
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| RDTSC_Available |
8 |
The RDTSC instruction is available.
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| PAE_Enabled |
9 |
The processor is PAE-enabled.
For more information, see: https://learn.microsoft.com/en-us/windows/win32/memory/physical-address-extension.
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| XMMI64_Available |
10 |
The SSE2 instruction set is available.
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| SSE_DAZ_Mode_Available |
11 |
The processor supports the denormals-are-zero (DAZ) mode for SSE instructions.
(This feature is not supported until Windows Vista.)
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| NX_Enabled |
12 |
Data execution prevention is enabled.
(This feature is not supported until Windows XP SP2 and Windows Server 2003 SP1.)
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| SSE3_Available |
13 |
The SSE3 instruction set is available.
(This feature is not supported until Windows Vista.)
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| Compare_Exchange128_Available |
14 |
The atomic compare and exchange 128-bit operation (cmpxchg16b) is available.
(This feature is not supported until Windows Vista.)
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| Compare64_Exchange128_Available |
15 |
The atomic compare 64 and exchange 128-bit operation (cmp8xchg16) is available.
(This feature is not supported until Windows Vista.)
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| Channels_Enabled |
16 |
The processor channels are enabled.
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| XSave_Enabled |
17 |
The processor implements the XSAVE and XRSTOR instructions.
(This feature is not supported until Windows 7 and Windows Server 2008 R2.)
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| ARM_VFP32_Registers_Available |
18 |
ARM processor: The VFP/Neon: 32 x 64bit register bank is present.
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| SecondLevelAddressTranslation_Available |
20 |
Second Level Address Translation is supported by the hardware.
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| VirtualFirmware_Enabled |
21 |
Virtualization is enabled in the firmware and made available by the operating system.
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| RDWRFSGS_Base_Available |
22 |
RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE instructions are available.
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| ARM_Divide_Available |
24 |
ARM processor: The divide instructions are available.
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| ARM64_LoadstoreAtomic_Available |
25 |
ARM processor: The 64-bit load/store atomic instructions are available.
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| ARM_ExternalCache_Available |
26 |
ARM processor: The external cache is available.
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| ARM_FMAC_Available |
27 |
ARM processor: The floating-point multiply-accumulate (FMAC) instruction is available.
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| ARM_V8_Instructions_Available |
29 |
ARM processor: This ARM processor implements the ARM v8 instructions set.
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| ARM_V8_CRYPTO_Instructions_Available |
30 |
ARM processor: This ARM processor implements the ARM v8 extra cryptographic instructions (for example, AES, SHA1 and SHA2). .
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| ARM_V8_CRC32_Instructions_Available |
31 |
ARM processor: This ARM processor implements the ARM v8 extra CRC32 instructions.
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| ARM_V81_ATOMIC_Instructions_Available |
34 |
ARM processor: This ARM processor implements the ARM v8.1 atomic instructions (for example, CAS, SWP).
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| SSSE3_Available |
36 |
The SSSE3 instruction set is available.
(This feature is not supported until Windows Vista.)
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| SSE41_Available |
37 |
The SSE4.1 instruction set is available.
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| SSE42_Available |
38 |
The SSE4.2 instruction set is available.
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| AVX_Available |
39 |
The AVX instruction set is available.
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| AVX2_Available |
40 |
The AVX2 instruction set is available.
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| AVX512F_Available |
41 |
The AVX512F instruction set is available.
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| ARM_V82_DP_Instructions_Available |
43 |
ARM processor: This ARM processor implements the ARM v8.2 DP instructions (for example, SDOT, UDOT).
This feature is optional in ARM v8.2 implementations and mandatory in ARM v8.4 implementations.
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| ARM_V83_JSCVT_Instructions_Available |
44 |
ARM processor: This ARM processor implements the ARM v8.3 JSCVT instructions (for example, FJCVTZS).
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| ARM_V83_LRCPC_Instructions_Available |
45 |
ARM processor: This ARM processor implements the ARM v8.3 LRCPC instructions (for example, LDAPR).
Note that certain ARM v8.2 CPUs may optionally support the LRCPC instructions.
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